The clock frequency is irrelevant – it is the frequency of the analog signal being sampled (in the case of the ADC) or signal being synthesized (in the case of the DAC) that matters.Īlthough the problem can be significant at quite modest signal frequencies (I have memories of digital audio systems with performance devastated by inappropriate clock oscillators – one a 555 timer, another an interrupt-driven microprocessor) it becomes critical in modern digital radios using IF sampling at signal frequencies of tens or hundreds of MHz. Obviously, the faster the sampled signal is changing, the greater the error will be for a given amount of jitter. In fact, frequency accuracy is often far less important. If an edge comes early, the signal being sampled will not yet have reached its correct value, and if it comes late, the signal will have moved on – so to achieve accuracy in a sampled system it is important to have adequately low jitter on the system clock. The frequency accuracy is unaffected, only the exact timing of individual transitions varies. If an oscillator has jitter, the clock edges occur earlier or later than they would in a jitter-free clock. In a sampled data system, a changing signal is sampled at regular intervals and the signal is processed by performing calculations on the samples. I frequently used Big Ben as an example when explaining the importance of various features of clocks and oscillators. We met at Westminster Hall in the Houses of Parliament in London, almost directly under Big Ben, whose chimes punctuated our deliberations. ![]() The performance of any ac sampling system is critically dependent on the use of a sampling clock with adequately low jitter.Ī quarter of a century ago I was technical advisor to a Parliamentary Committee on CB Radio. ![]() My clock is accurate to 1 ppm-what could possibly need improvement? Answer:
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